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    ISCAS
    2005
    IEEE
    136views Hardware» more  ISCAS 2005»
    Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
    13 years 10 months ago
    Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
    Download  www.ece.ualberta.ca
    — Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
    Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon
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    GLOBECOM
    2007
    IEEE
    163views Communications» more  GLOBECOM 2007»
    A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders
    13 years 11 months ago
    A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders
    Download  www.eecs.harvard.edu
    Abstract—A bit-node centric decoder architecture for lowdensity parity-check codes is proposed. This architecture performs the optimum sum-product algorithm. A bit node processin...
    Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...
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