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    DAC
    2007
    ACM
    126views Computer Architecture» more  DAC 2007»
    Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
    14 years 6 months ago
    Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
    Download  www.engr.uconn.edu
    Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
    Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
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    DAC
    2007
    ACM
    145views Computer Architecture» more  DAC 2007»
    The KILL Rule for Multicore
    14 years 6 months ago
    The KILL Rule for Multicore
    Download  profs.sci.univr.it
    Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
    Anant Agarwal, Markus Levy
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    DAC
    2007
    ACM
    129views Computer Architecture» more  DAC 2007»
    Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
    14 years 6 months ago
    Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
    Download  lap.epfl.ch
    Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
    Ajay K. Verma, Philip Brisk, Paolo Ienne
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    DAC
    2007
    ACM
    97views Computer Architecture» more  DAC 2007»
    Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs
    14 years 6 months ago
    Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs
    Download  eprints.eemcs.utwente.nl
    A key step in the design of cyclo-static real-time systems is the determination of buffer capacities. In our multi-processor system, we apply back-pressure, which means that tasks...
    Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit
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    DAC
    2007
    ACM
    124views Computer Architecture» more  DAC 2007»
    Scan Test Planning for Power Reduction
    14 years 6 months ago
    Scan Test Planning for Power Reduction
    Download  www.ra.informatik.uni-stuttgart.de
    Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
    Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
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    DAC
    2007
    ACM
    130views Computer Architecture» more  DAC 2007»
    IPR: An Integrated Placement and Routing Algorithm
    14 years 6 months ago
    IPR: An Integrated Placement and Routing Algorithm
    Download  home.eng.iastate.edu
    Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
    Min Pan, Chris C. N. Chu
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    DAC
    2007
    ACM
    116views Computer Architecture» more  DAC 2007»
    Optimal Selection of Voltage Regulator Modules in a Power Delivery Network
    14 years 6 months ago
    Optimal Selection of Voltage Regulator Modules in a Power Delivery Network
    Download  atrak.usc.edu
    High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
    Behnam Amelifard, Massoud Pedram
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    DAC
    2007
    ACM
    112views Computer Architecture» more  DAC 2007»
    Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
    14 years 6 months ago
    Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
    Download  dns.ime.tsinghua.edu.cn
    In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
    Tao Li, Zhiping Yu
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    DAC
    2008
    ACM
    168views Computer Architecture» more  DAC 2008»
    Faster symmetry discovery using sparsity of symmetries
    14 years 6 months ago
    Faster symmetry discovery using sparsity of symmetries
    Download  www.eecs.umich.edu
    Many computational tools have recently begun to benefit from the use of the symmetry inherent in the tasks they solve, and use general-purpose graph symmetry tools to uncover this...
    Paul T. Darga, Karem A. Sakallah, Igor L. Markov
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    DAC
    2008
    ACM
    143views Computer Architecture» more  DAC 2008»
    Tera-scale computing and interconnect challenges
    14 years 6 months ago
    Tera-scale computing and interconnect challenges
    Download  www.cc.gatech.edu
    Jerry Bautista
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