DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
Region concept helps to accommodate cores larger than the tile size in mesh topology NoC architectures. In addition, it offers many new opportunities for NoC design, as well as pr...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
We propose a power model for the Nostrum NoC. For this purpose an empirical power model of links and switches has been formulated and validated with the Synopsys Power Compiler. T...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
The ModEasy project seeks to develop techniques and software tools to aid in the development of reliable microprocessor based electronic (embedded) systems using advanced developm...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
The rising complexity, customization and short time to market of modern digital systems requires automatic methods for generation of high performance architectures for such system...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
In wireless sensor networks, the coarse grained localization is a method to compute the position of randomly distributed sensor nodes. Without optimizations, it provides low preci...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
Recently, a number of works have been published on implementing assignment decision diagram models combined with SAT methods to address register-transfer level test pattern genera...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
— An on-chip communication network is most power efficient when it operates just below the saturation point. For any given traffic load the network can be operated in this regi...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
Traditionally, an embedded system design process demands a considerable amount of expertise, time and money. This makes developing embedded systems difficult for many companies, a...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
We propose a novel two-level Boolean minimizer coming in succession to our previously developed minimizer BOOM, so we have named it BOOM-II. It is a combination of two minimizers,...