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ERSA
2006
98views Hardware» more  ERSA 2006»
13 years 6 months ago
Shield Effect Analysis for a Gate Array on An Optically Reconfigurable Gate Array
To date, some types of Optically Reconfigurable Gate Arrays (ORGAs) have been developed to realize capabilities of rapid reconfiguration with numerous reconfiguration contexts. How...
Minoru Watanabe, Fuminori Kobayashi
ERSA
2006
76views Hardware» more  ERSA 2006»
13 years 6 months ago
Logic Synthesis and Place-and-Route Environment for ORGAs
Abstract-- We have continued development of Optically Reconfigurable Gate Arrays (ORGAs) to realize larger virtual gate count VLSIs than currently available VLSIs. The grain and st...
Minoru Watanabe, Fuminori Kobayashi
ERSA
2006
161views Hardware» more  ERSA 2006»
13 years 6 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
ERSA
2006
102views Hardware» more  ERSA 2006»
13 years 6 months ago
Process Isolation for Reconfigurable Hardware
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
ERSA
2004
192views Hardware» more  ERSA 2004»
13 years 6 months ago
VTSim: A Virtex-II Device Simulator
This paper introduces VTsim, a device simulator for Xilinx Virtex-II FPGAs. VTsim is currently a globally synchronous event-driven device simulator modeled at the CLB level. Throu...
Jesse Hunter, Peter Athanas, Cameron Patterson
ERSA
2004
118views Hardware» more  ERSA 2004»
13 years 6 months ago
Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor
Paul M. Heysters, Gerard J. M. Smit, Egbert Molenk...
ERSA
2004
130views Hardware» more  ERSA 2004»
13 years 6 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna
ERSA
2004
148views Hardware» more  ERSA 2004»
13 years 6 months ago
Efficient Floating-point Based Block LU Decomposition on FPGAs
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sr...
ERSA
2004
134views Hardware» more  ERSA 2004»
13 years 6 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner