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APNOMS
2006
Springer
13 years 8 months ago
Scalable DiffServ-over-MPLS Traffic Engineering with Per-flow Traffic Policing
This paper proposes a DiffServ-over-MPLS Traffic Engineering (TE) architecture and describes the implementation of its functional blocks on Intel IXP2400 Network Processor using In...
Djakhongir Siradjev, Ivan Gurin, Young-Tak Kim
EURODAC
1994
IEEE
149views VHDL» more  EURODAC 1994»
13 years 8 months ago
A Graphical Approach to Analogue Behavioural Modelling
In order to master the growing complexity of analogue electronic systems, modelling and simulation of analogue hardware at various levels is absolutely necessary. This paper prese...
Vincent Moser, Pascal Nussbaum, Hans Peter Amann, ...
DAC
2009
ACM
13 years 11 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm