ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
We have created a stochastic impulse-response (IR) momentextraction algorithm for RC circuit networks. It employs a newly discovered Feynman Sum-over-Paths Postulate. Full paralle...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
This work studies the optimality and stability of timing-driven placement algorithms. The contributions of this work include two parts: 1) We develop an algorithm for generating s...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
In this paper, we study the problem of retiming of sequential circuits with both interconnect and gate delay. Most retiming algorithms have assumed ideal conditions for the non-lo...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
Optimizing array accesses is extremely critical in embedded computing as many embedded applications make use of arrays (in form of images, video frames, etc). Previous research co...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...