Sciweavers

DAC
2009
ACM
13 years 10 months ago
Way Stealing: cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
EUROPAR
2000
Springer
14 years 29 days ago
Automatic SIMD Parallelization of Embedded Applications Based on Pattern Recognition
This paper investigates the potential for automatic mapping of typical embedded applications to architectures with multimedia instruction set extensions. For this purpose a (patter...
Rashindra Manniesing, Ireneusz Karkowski, Henk Cor...
DATE
2005
IEEE
109views Hardware» more  DATE 2005»
14 years 3 months ago
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
CODES
2008
IEEE
14 years 3 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
DAC
2004
ACM
14 years 10 months ago
Introduction of local memory elements in instruction set extensions
Partha Biswas, Vinay Choudhary, Kubilay Atasu, Lau...
DAC
2009
ACM
14 years 10 months ago
Way Stealing:cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...