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ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
10 years 2 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
ISCA
1994
IEEE
104views Hardware» more  ISCA 1994»
10 years 2 months ago
Exploring the Design Space for a Shared-Cache Multiprocessor
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
Basem A. Nayfeh, Kunle Olukotun
ISCA
1994
IEEE
117views Hardware» more  ISCA 1994»
10 years 2 months ago
Evaluating Stream Buffers as a Secondary Cache Replacement
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
Subbarao Palacharla, Richard E. Kessler
ISCA
1994
IEEE
116views Hardware» more  ISCA 1994»
10 years 2 months ago
Tradeoffs in Two-Level On-Chip Caching
Norman P. Jouppi, Steven J. E. Wilton
ISCA
1994
IEEE
80views Hardware» more  ISCA 1994»
10 years 2 months ago
A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors
This paper presents an examination of different cache and processor configurations assuming transistor densities will continue to increase as they have in the past. While in the s...
Matthew K. Farrens, Gary S. Tyson, Andrew R. Plesz...
ISCA
1994
IEEE
132views Hardware» more  ISCA 1994»
10 years 2 months ago
Complexity/Performance Tradeoffs with Non-Blocking Loads
Keith I. Farkas, Norman P. Jouppi
ISCA
1994
IEEE
93views Hardware» more  ISCA 1994»
10 years 2 months ago
RAID-II: A High-Bandwidth Network File Server
In 1989, the RAID (Redundant Arrays of Inexpensive Disks) group at U. C. Berkeley built a prototype disk array called RAID-I. The bandwidth delivered to clients by RAID-I was seve...
Ann L. Drapeau, Ken Shirriff, John H. Hartman, Eth...
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
10 years 2 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
ISCA
1994
IEEE
88views Hardware» more  ISCA 1994»
10 years 2 months ago
A Unified Architectural Tradeoff Methodology
Wepresentaunijiedapp?'each to assess thet7adeoff of architecture techniques that affect mean memory access time. The architectural features we consider inciude cache hit Tati...
Chung-Ho Chen, Arun K. Somani
ISCA
1994
IEEE
90views Hardware» more  ISCA 1994»
10 years 2 months ago
Combined Performance Gains of Simple Cache Protocol Extensions
Fredrik Dahlgren, Michel Dubois, Per Stenströ...
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