ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
The SHRIMP cluster-computing system has progressed to a point of relative maturity; a variety of applications are running on a 16-node system. We have enough experience to underst...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper investigates the placement of data and parity on redundant disk arrays. Declustered organizations have been traditionally used to achieve fast reconstruction of a faile...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory ac...