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ISCA
2008
IEEE
101views Hardware» more  ISCA 2008»
13 years 4 months ago
Scalability in Analyzing the Availability of Large-Scale Networks using Multicast
The goal of this paper is to identify and discuss scalability issues for the measurement-based analysis of the availability in large-scale networks using IP multicast technology. ...
Falko Dressler
ISCA
2008
IEEE
136views Hardware» more  ISCA 2008»
13 years 4 months ago
A Randomized Queueless Algorithm for Breadth-First Search
First Come First Served is a policy that is accepted for implementing fairness in a number of application domains such as scheduling in Operating Systems [28, 11], scheduling web ...
K. Subramani, Kamesh Madduri
ISCA
2008
IEEE
136views Hardware» more  ISCA 2008»
13 years 4 months ago
The Design and Performance of a Bare PC Web Server
There is an increasing need for new Web server architectures that are application-centric, simple, small, and pervasive in nature. In this paper, we present a novel architecture f...
Long He, Ramesh K. Karne, Alexander L. Wijesinha
ISCA
2008
IEEE
185views Hardware» more  ISCA 2008»
13 years 4 months ago
From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware
Dynamic information flow tracking (also known as taint tracking) is an appealing approach to combat various security attacks. However, the performance of applications can severely...
Haibo Chen, Xi Wu, Liwei Yuan, Binyu Zang, Pen-Chu...
ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
13 years 4 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
13 years 4 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
ISCA
2008
IEEE
119views Hardware» more  ISCA 2008»
13 years 4 months ago
Technology-Driven, Highly-Scalable Dragonfly Topology
Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks,...
John Kim, William J. Dally, Steve Scott, Dennis Ab...
ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
13 years 11 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...
ISCA
2008
IEEE
170views Hardware» more  ISCA 2008»
13 years 11 months ago
Polymorphic On-Chip Networks
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...
Martha Mercaldi Kim, John D. Davis, Mark Oskin, To...
ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
13 years 11 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...