ISCA
2010
IEEE
13 years 2 months ago
2010
IEEE
ISCA
2010
IEEE
13 years 3 months ago
2010
IEEE
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
ISCA
2010
IEEE
13 years 3 months ago
2010
IEEE
Virtualization has the potential to dramatically reduce the total cost of ownership of datacenters and increase the flexibility of deployments for general-purpose workloads. If pr...
ISCA
2010
IEEE
13 years 3 months ago
2010
IEEE
Practical cache replacement policies attempt to emulate optimal replacement by predicting the re-reference interval of a cache block. The commonly used LRU replacement policy alwa...
ISCA
2010
IEEE
13 years 3 months ago
2010
IEEE
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
ISCA
2010
IEEE
13 years 7 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
ISCA
2010
IEEE
13 years 7 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
ISCA
2010
IEEE
13 years 8 months ago
2010
IEEE
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...