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ISCA
2010
IEEE
181views Hardware» more  ISCA 2010»
13 years 10 months ago
ColorSafe: architectural support for debugging and dynamically avoiding multi-variable atomicity violations
In this paper, we propose ColorSafe, an architecture that detects and dynamically avoids single- and multi-variable atomicity violation bugs. The key idea is to group related data...
Brandon Lucia, Luis Ceze, Karin Strauss
ISCA
2010
IEEE
204views Hardware» more  ISCA 2010»
13 years 10 months ago
Energy proportional datacenter networks
Numerous studies have shown that datacenter computers rarely operate at full utilization, leading to a number of proposals for creating servers that are energy proportional with r...
Dennis Abts, Michael R. Marty, Philip M. Wells, Pe...
ISCA
2010
IEEE
340views Hardware» more  ISCA 2010»
13 years 10 months ago
Necromancer: enhancing system throughput by animating dead cores
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
13 years 10 months ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
ISCA
2010
IEEE
413views Hardware» more  ISCA 2010»
13 years 10 months ago
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...
Xiaochen Guo, Engin Ipek, Tolga Soyata
ISCA
2010
IEEE
292views Hardware» more  ISCA 2010»
13 years 10 months ago
Thread tailor: dynamically weaving threads together for efficient, adaptive parallel applications
Janghaeng Lee, Haicheng Wu, Madhumitha Ravichandra...
ISCA
2010
IEEE
170views Hardware» more  ISCA 2010»
13 years 10 months ago
Relax: an architectural framework for software recovery of hardware faults
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaral...
ISCA
2010
IEEE
239views Hardware» more  ISCA 2010»
13 years 10 months ago
Sentry: light-weight auxiliary memory access control
Light-weight, flexible access control, which allows software to regulate reads and writes to any granularity of memory region, can help improve the reliability of today’s multi...
Arrvindh Shriraman, Sandhya Dwarkadas
ISCA
2010
IEEE
210views Hardware» more  ISCA 2010»
13 years 10 months ago
An intra-chip free-space optical interconnect
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their performance, functionality, and hence, complexity. Simultaneously, relentless s...
Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun ...