ISPD
1999
ACM
13 years 9 months ago
1999
ACM
Buffer insertion is an effective approach to achieve both minimal clock signal delay and skew in high speed VLSI circuit design. In this paper, we develop an optimal buffer ins...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
Typical placement objectives involve reducing net-cut cost or minimizing wirelength. Congestion minimization is least understood, however, it models routability accurately. In thi...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
- Route Embedding, a new method for mitigating the impact of crosstalk, is presented. It modifies a set of global-route structures to prevent timing and noise-margin violations ca...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
Netlist partitioning is an important and well studied problem. In this paper, a linear time partitioning approach based on iterative deletion is presented. We use the partitioning...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
We review the implications of subwavelength optical lithography for new tools and ows in the interface between layout design and manufacturability. After discussing the necessity ...