ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
The ever increasing complexity of embedded systems consisting of hardware and software components poses a challenge in verifying their correctness, New verification methods that o...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation ...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
Time-driven simulation models typically model timing in an idealized way that is over-constrained and cannot be directly implemented. In this paper we present a transformation to ...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...