Sciweavers

ISVLSI
2002
IEEE
84views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
ISVLSI
2002
IEEE
174views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
Alice Wang, Anantha Chandrakasan, Stephen V. Koson...
ISVLSI
2002
IEEE
116views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Multi-Output Timed Shannon Circuits
Timed Shannon circuits have been proposed as a synthesis approach for a low power optimization technique at the logic level since overall circuit switching probabilities may be re...
Mitchell A. Thornton, Rolf Drechsler, D. Michael M...
ISVLSI
2002
IEEE
89views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Speedup of Self-Timed Digital Systems Using Early Completion
An Early Completion technique is developed to significantly increase the throughput of NULL Convention self-timed digital systems without impacting latency or compromising their s...
Scott C. Smith
ISVLSI
2002
IEEE
93views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Temperature Variable Supply Voltage for Power Reduction
The scaling trend of MOSFETs requires the supply and the threshold voltages to be reduced in future generations. Although the supply voltage is reduced, the total power dissipatio...
Kaveh Shakeri, James D. Meindl
ISVLSI
2002
IEEE
104views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation
Modular inverse computation is needed in several public key cryptographic applications. In this work, we present two VLSI hardware implementations used in the calculation of Montg...
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, &Ccedi...
ISVLSI
2002
IEEE
105views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Datapath Scheduling using Dynamic Frequency Clocking
Saraju P. Mohanty, N. Ranganathan, Vamsi Krishna
ISVLSI
2002
IEEE
81views VLSI» more  ISVLSI 2002»
13 years 9 months ago
Impact of Technology Scaling in the Clock System Power
The clock distribution and generation circuitry is known to consume more than a quarter of the power budget of existing microprocessors. A previously derived clock energy model is...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
ISVLSI
2002
IEEE
155views VLSI» more  ISVLSI 2002»
13 years 9 months ago
A High Speed Shift-Invariant Wavelet Transform Chip for Video Compression
Wavelet-based video compression can provide improved codec and bit rates. The shift-variance problem of the discrete wavelet transform on image sequences, however, may cause large...
Henry Y. H. Chuang, David P. Birch, Li-Chang Liu, ...
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
13 years 9 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...