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ITC
1996
IEEE
94views Hardware» more  ITC 1996»
13 years 9 months ago
An ATPG-Based Framework for Verifying Sequential Equivalence
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, ...
ITC
1996
IEEE
98views Hardware» more  ITC 1996»
13 years 9 months ago
Mixed-Mode BIST Using Embedded Processors
Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...
Sybille Hellebrand, Hans-Joachim Wunderlich, Andre...
ITC
1996
IEEE
96views Hardware» more  ITC 1996»
13 years 9 months ago
Analysis and Detection of Timing Failures in an Experimental Test Chip
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimen...
Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin...
ITC
1996
IEEE
99views Hardware» more  ITC 1996»
13 years 9 months ago
Detecting Delay Flaws by Very-Low-Voltage Testing
The detectability of delay flaws can be improved by testing CMOS IC's with a very low supply voltage -between 2 and 2.5 times the threshold voltage Vt of the transistors. A d...
Jonathan T.-Y. Chang, Edward J. McCluskey