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JEC
2006
90views more  JEC 2006»
8 years 9 months ago
The impact of traffic aggregation on the memory performance of networking applications
The trend of the networking processing is to increase the intelligence of the routers (i.e. security capacities). This means that there is an increment in the workload generated p...
Javier Verdú, Jorge García-Vidal, Ma...
JEC
2006
113views more  JEC 2006»
8 years 9 months ago
CyNC: A method for real time analysis of systems with cyclic data flows
The paper addresses a novel method for realtime analysis of systems with cyclic data flows. The presented method is based on Network Calculus principles, where upper and lower flo...
Henrik Schiøler, Jens Dalsgaard Nielsen, Ki...
JEC
2006
77views more  JEC 2006»
8 years 9 months ago
Tiny split data-caches make big performance impact for embedded applications
This paper shows that even very small data caches, when split to serve data streams exhibiting temporal and spatial localities, can improve performance of embedded applications wit...
Afrin Naz, Krishna M. Kavi, Wentong Li, Philip H. ...
JEC
2006
88views more  JEC 2006»
8 years 9 months ago
Joint garbage collection and hard real-time scheduling
We analyze the integration of automatic memory management in a real-time context. We focus on integrating a real-time (copying) garbage collector with hard real-time static-priori...
Maxime Van Assche, Joël Goossens, Raymond R. ...
JEC
2006
88views more  JEC 2006»
8 years 9 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
JEC
2006
71views more  JEC 2006»
8 years 9 months ago
Destructive-read in embedded DRAM, impact on power consumption
This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower ...
Haakon Dybdahl, Per Gunnar Kjeldsberg, Marius Gran...
JEC
2006
100views more  JEC 2006»
8 years 9 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...
JEC
2006
69views more  JEC 2006»
8 years 9 months ago
Application partitioning on programmable platforms using the ant colony optimization
Modern digital systems consist of a complex mix of computational resources, e.g. microprocessors, memory elements and reconfigurable logic. System partitioning
Gang Wang, Wenrui Gong, Ryan Kastner
JEC
2006
73views more  JEC 2006»
8 years 9 months ago
Frame packing algorithms for automotive applications
The set of frames exchanged in automotive applications must meet two constraints: it has to be feasible from a schedulability point of view and it should minimize the network bandw...
Rishi Saket, Nicolas Navet
JEC
2006
71views more  JEC 2006»
8 years 9 months ago
Issues in Embedded Single-Chip Multicore Architectures
Sandro Bartolini, Roberto Giorgi
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