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VTS
2005
IEEE
116views Hardware» more  VTS 2005»
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
12 years 11 months ago
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
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— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
Kartik Mohanram
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