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DFT
2005
IEEE
103views VLSI» more  DFT 2005»
13 years 11 months ago
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...