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VLSID
1999
IEEE
86views VLSI» more  VLSID 1999»
13 years 9 months ago
Multi-Valued Logic Synthesis
We survey some of the methods used for manipulating, representing, and optimizing multi-valued logic with the view of both building a better understanding of the more specialized ...
Robert K. Brayton, Sunil P. Khatri
ICCAD
2000
IEEE
113views Hardware» more  ICCAD 2000»
13 years 9 months ago
Don't Cares and Multi-Valued Logic Network Minimization
We address optimizing multi-valued (MV) logic functions in a multi-level combinational logic network. Each node in the network, called an MV-node, has multi-valued inputs and sing...
Yunjian Jiang, Robert K. Brayton
TACAS
2001
Springer
135views Algorithms» more  TACAS 2001»
13 years 9 months ago
Implementing a Multi-valued Symbolic Model Checker
Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dyn...
Marsha Chechik, Benet Devereux, Steve M. Easterbro...
ISMVL
2003
IEEE
111views Hardware» more  ISMVL 2003»
13 years 10 months ago
Modeling Multi-Valued Circuits in SystemC
The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area...
Daniel Große, Görschwin Fey, Rolf Drech...
DAC
2002
ACM
14 years 6 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton