Sciweavers

Share
warning: Creating default object from empty value in /var/www/modules/taxonomy/taxonomy.module on line 1416.
DAC
2005
ACM
11 years 1 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
LCTRTS
2007
Springer
11 years 5 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
DATE
2007
IEEE
65views Hardware» more  DATE 2007»
11 years 6 months ago
Clock-frequency assignment for multiple clock domain systems-on-a-chip
Modern systems-on-a-chip platforms support multiple clock domains, in which different sub-circuits are driven by different clock signals. Although the frequency of each domain can...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...
ICCD
2003
IEEE
98views Hardware» more  ICCD 2003»
11 years 8 months ago
Specifying and Verifying Systems with Multiple Clocks
Multiple clock domains are a challenge for hardware speciļ¬cation and veriļ¬cation. We present a method for specifying the relations between multiple clocks, and for modeling th...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
ICCD
2007
IEEE
121views Hardware» more  ICCD 2007»
11 years 8 months ago
Fast power network analysis with multiple clock domains
This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transf...
Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Z...
books