TVLSI
2002
13 years 4 months ago
2002
This paper compares four previously published static dual-edge-triggered flip-flops (DETFFs) with a proposed design for their performance, power dissipation, and low-voltage low-po...
FPGA
2008
ACM
13 years 6 months ago
2008
ACM
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
CISS
2007
IEEE
13 years 11 months ago
2007
IEEE
—Network coding and cooperative diversity have each extensively been explored in the literature as a means to substantially improve the performance of wireless networks. Yet, lit...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...