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TCAD
2008
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13 years 4 months ago
Reduction of Parametric Failures in Sub-100-nm SRAM Array Using Body Bias
Abstract--In this paper, we present a postsilicon-tuning technique to improve parametric yield of SRAM array using body bias (BB). First, we show that, although parametric failures...
Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy