Sciweavers

Share
warning: Creating default object from empty value in /var/www/modules/taxonomy/taxonomy.module on line 1416.
PATMOS
2005
Springer
12 years 2 days ago
Efficient Simulation of Power/Ground Networks with Package and Vias
As the number of metal layers and the frequency of VLSI continue to increase, the voltage droop on both the package and vias is becoming more pronounced. This paper analyzes the nu...
Jin Shi, Yici Cai, Xianlong Hong, Sheldon X.-D. Ta...
PATMOS
2005
Springer
12 years 2 days ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
PATMOS
2005
Springer
12 years 2 days ago
Area-Aware Pipeline Gating for Embedded Processors
Modern embedded processors use small and simple branch predictors to improve performance. Using complex and accurate branch predictors, while desirable, is not possible as such pre...
Babak Salamat, Amirali Baniasadi
PATMOS
2005
Springer
12 years 2 days ago
Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems
Abstract. Modern embedded devices (e.g. PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems inclu...
José Manuel Velasco, David Atienza, Katzali...
PATMOS
2005
Springer
12 years 2 days ago
Design of Variable Input Delay Gates for Low Dynamic Power Circuits
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
PATMOS
2005
Springer
12 years 2 days ago
Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications
In this paper, we present a low power high temperature 80C51 microcontroller. The low power optimizations are applied at gate and architectural level, by using extensive clock and ...
Philippe Manet, David Bol, Renaud Ambroise, Jean-D...
PATMOS
2005
Springer
12 years 2 days ago
Improving the Memory Bandwidth Utilization Using Loop Transformations
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
Minas Dasygenis, Erik Brockmeyer, Francky Catthoor...
PATMOS
2005
Springer
12 years 2 days ago
A Power-Efficient and Scalable Load-Store Queue Design
Abstract. The load-store queue (LQ-SQ) of modern superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed a...
Fernando Castro, Daniel Chaver, Luis Piñuel...
PATMOS
2005
Springer
12 years 2 days ago
Enhanced GALS Techniques for Datapath Applications
Abstract. Based on a previously reported request driven technique for Globally-Asynchronous Locally-Synchronous (GALS) circuits this paper presents two significant enhancements. Fi...
Eckhard Grass, Frank Winkler, Milos Krstic, Alexan...
books