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ITC
1994
IEEE
151views Hardware» more  ITC 1994»
13 years 9 months ago
Automated Logic Synthesis of Random-Pattern-Testable Circuits
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
Nur A. Touba, Edward J. McCluskey
ITC
1996
IEEE
98views Hardware» more  ITC 1996»
13 years 9 months ago
Mixed-Mode BIST Using Embedded Processors
Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...
Sybille Hellebrand, Hans-Joachim Wunderlich, Andre...
3DIM
2007
IEEE
13 years 11 months ago
Silhouette Extraction with Random Pattern Backgrounds for the Volume Intersection Method
In this paper, we present a novel approach for extracting silhouettes by using a particular pattern that we call the random pattern. The volume intersection method reconstructs th...
Masahiro Toyoura, Masaaki Iiyama, Koh Kakusho, Mic...