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SAMOS
2004
Springer
13 years 10 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
SAMOS
2004
Springer
13 years 10 months ago
Synchronous Transfer Architecture (STA)
This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and ...
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil...
SAMOS
2004
Springer
13 years 10 months ago
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code
Abstract. This article presents a novel design flow called MOUSE for the effective development of digital signal processing systems in terms of development time, performance and p...
Gordon Cichon, Gerhard Fettweis
SAMOS
2004
Springer
13 years 10 months ago
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...
SAMOS
2004
Springer
13 years 10 months ago
Modeling Loop Unrolling: Approaches and Open Issues
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
João M. P. Cardoso, Pedro C. Diniz
SAMOS
2004
Springer
13 years 10 months ago
Self-loop Pipelining and Reconfigurable Dataflow Arrays
Abstract. This paper presents some interesting concepts of static dataflow machines that can be used by reconfigurable computing architectures. We introduce some data-driven reconf...
João M. P. Cardoso
SAMOS
2004
Springer
13 years 10 months ago
High-Speed Event-Driven RTL Compiled Simulation
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
Alexey Kupriyanov, Frank Hannig, Jürgen Teich
SAMOS
2004
Springer
13 years 10 months ago
Using CoDeL to Rapidly Prototype Network Processsor Extensions
Abstract. The focus of this work is on techniques that promise to reduce the message delivery latency in message passing environments, incuding clusters of workstations or SMPs. We...
Nainesh Agarwal, Nikitas J. Dimopoulos
SAMOS
2004
Springer
13 years 10 months ago
Generated DSP Cores for Implementation of an OFDM Communication System
Hendrik Seidel, Emil Matús, Gordon Cichon, ...
SAMOS
2004
Springer
13 years 10 months ago
A Low-Power Multithreaded Processor for Baseband Communication Systems
Embedded digital signal processors for baseband communication systems have stringent design constraints including high computational bandwidth, low power consumption, and low inter...
Michael J. Schulte, C. John Glossner, Suman Mamidi...