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SAMOS
2004
Springer

Synchronous Transfer Architecture (STA)

9 years 11 months ago
Synchronous Transfer Architecture (STA)
This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and coarse-grain reconfigurable hardware. STA processors are modeled using a common machine description suitable for both compiler and core generator. The core generator is able to generate models in Lisa, System-C, and VHDL. A special emphasis is placed on the good synthesis of the generated VHDL model.
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil
Added 02 Jul 2010
Updated 02 Jul 2010
Type Conference
Year 2004
Where SAMOS
Authors Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard Fettweis
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