Sciweavers

SLIP
2005
ACM
13 years 10 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
SLIP
2005
ACM
13 years 10 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
SLIP
2005
ACM
13 years 10 months ago
Predictions of CMOS compatible on-chip optical interconnect
Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas...
SLIP
2005
ACM
13 years 10 months ago
Multilevel full-chip routing with testability and yield enhancement
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
Katherine Shu-Min Li, Chung-Len Lee, Yao-Wen Chang...