ICCAD
1995
IEEE
13 years 8 months ago
1995
IEEE
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
An e cient solution to the wire sizing problem WSP usingthe Elmoredelaymodelisproposed. Two formulations of the problem are put forth: in the rst, the minimum interconnect delay i...
VLSID
2003
IEEE
14 years 5 months ago
2003
IEEE
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...