Sciweavers

FPL
2011
Springer
195views Hardware» more  FPL 2011»
12 years 4 months ago
The Impact of Aging on an FPGA-Based Physical Unclonable Function
—On-chip Physical Unclonable Functions (PUFs) are emerging as a powerful security primitive that can potentially solve several security problems. A PUF needs to be robust against...
Abhranil Maiti, Logan McDougall, Patrick Schaumont
FPL
2008
Springer
138views Hardware» more  FPL 2008»
13 years 6 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...
DFT
2007
IEEE
123views VLSI» more  DFT 2007»
13 years 11 months ago
Checker Design for On-line Testing of Xilinx FPGA Communication Protocols
In the paper, a methodology of developing checkers for communication protocol testing is presented. It was used to develop checker to test IP cores communication protocol implemen...
Martin Straka, Jiri Tobola, Zdenek Kotásek