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An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults

13 years 5 months ago

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We present an efficient built-in self-test (BIST) architecture for testing and diagnosing stuck-at faults, delay faults, and bridging faults in FPGA interconnect resources. The BIS...

Jack Smith, Tian Xia, Charles E. Stroud

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