A holistic methodology for network processor design

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The GigaNetIC project aims to develop high-speed components for networking applications based on massively parallel architectures. A central part of this project is the design, evaluation, and realization of a parameterizable network processing unit. In this paper we present a design methodology for network processors which encompasses the research areas from the application software down to the gate level of the chip. Key components of this holistic approach have been successfully applied to characteristic examples of architecture reﬁnements.

Olaf Bonorden, Nikolaus Brüls, Uwe Kastens, D

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GigaNetIC Project | LCN 2003 | Massively Parallel | Network Processing Unit |

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Added	05 Jul 2010
Updated	05 Jul 2010
Type	Conference
Year	2003
Where	LCN
Authors	Olaf Bonorden, Nikolaus Brüls, Uwe Kastens, Dinh Khoi Le, Friedhelm Meyer auf der Heide, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies

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A holistic methodology for network processor design

GigaNetIC Project | LCN 2003 | Massively Parallel | Network Processing Unit |

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