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ICCAD
1993
IEEE

Unifying synchronous/asynchronous state machine synthesis

13 years 8 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “burst-mode” multiple-input change asynchronous designs [21], but also allows the automatic synthesis of any synchronous Moore machine using only basic gates (and no state-holding elements). Moreover, the synthesis method covers many circuit styles in the range between burst-mode and fully synchronous. We can easily specify and synthesize sequential circuits which change state on both rising and falling clock edges, have multiple-phase clocks, etc., and mixed synchronous/asynchronousdesigns,subject only to setup and holdtime constraints. To demonstrate the effectiveness of the design style and the synthesis tool, we present a modified version of a previously published large practical controller design — the SCSI data transfer controller [14] redesigned to improve performance and to eliminate preprocessingcir...
Kenneth Y. Yun, David L. Dill
Added 08 Aug 2010
Updated 08 Aug 2010
Type Conference
Year 1993
Where ICCAD
Authors Kenneth Y. Yun, David L. Dill
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