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ICCAD
1993
IEEE
123views Hardware» more  ICCAD 1993»
13 years 9 months ago
Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi
ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
13 years 9 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
13 years 9 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
ICCAD
1993
IEEE
85views Hardware» more  ICCAD 1993»
13 years 9 months ago
Input don't care sequences in FSM networks
Current approaches to compute and exploit the flexibility of a component in an FSM network are all at the symbolic level [23, 30, 33, 31]. Conventionally, exploitation of this ï¬...
Huey-Yih Wang, Robert K. Brayton
ICCAD
1993
IEEE
101views Hardware» more  ICCAD 1993»
13 years 9 months ago
Convexity-based algorithms for design centering
A new technique for design centering, and for polytope approximation of the feasible region for a design are presented. In the rst phase, the feasible region is approximated by a ...
Sachin S. Sapatnekar, Pravin M. Vaidya, Steve M. K...
ICCAD
1993
IEEE
120views Hardware» more  ICCAD 1993»
13 years 9 months ago
Merging multiple FSM controllers for DFT/BIST hardware
Debaditya Mukherjee, Massoud Pedram, Melvin A. Bre...
ICCAD
1993
IEEE
141views Hardware» more  ICCAD 1993»
13 years 9 months ago
Boolean matching for full-custom ECL gates
Robert N. Mayo, Hervé J. Touati
ICCAD
1993
IEEE
100views Hardware» more  ICCAD 1993»
13 years 9 months ago
Macromodeling of the A.C. characteristics of CMOS Op-amps
An analytical-knowledge-based statistical method is developed to derive macromodels for the highly nonlinear A.C. response functions of CMOS Op-amp circuits. Simple circuit analys...
Pradip Mandal, V. Visvanathan