Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

12

ICCAD
1994
IEEE

favoriteEmaildiscussreport

102views Hardware» more ICCAD 1994»

Clock period constrained minimal buffer insertion in clock trees

13 years 8 months ago

Clock period constrained minimal buffer insertion in clock trees

Download www.cs.york.ac.uk

Gustavo E. Téllez, Majid Sarrafzadeh

Real-time Traffic

Hardware | ICCAD 1994 |

claim paper

Related Content

» Buffer insertion for clock delay and skew minimization

» Dynamic thermal clock skew compensation using tunable delay buffers

» Gate planning during placement for gated clock network

» Hybrid Structured Clock Network Construction

» A dualMST approach for clock network synthesis

Post Info
More Details (n/a)

Added	08 Aug 2010
Updated	08 Aug 2010
Type	Conference
Year	1994
Where	ICCAD
Authors	Gustavo E. Téllez, Majid Sarrafzadeh

Comments (0)