ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
We present a new min-cut based placement algorithm for large scale sea-of-gates arrays. In the past all such algorithms used a xed cut line sequence that is determined before min...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
In this paper we present an enhanced design flow model that increases the capabilities of a CAD framework to support design activities on hierarchical multi-view design descriptio...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical com...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
We consider two versions of the problem of folding a stack of equal width components. In both versions, when a stack is folded, a routing penalty is incurred at the fold. In one v...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
