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ICCAD
1994
IEEE
119views Hardware» more  ICCAD 1994»
9 years 5 months ago
Adaptive cut line selection in min-cut placement for large scale sea-of-gates arrays
We present a new min-cut based placement algorithm for large scale sea-of-gates arrays. In the past all such algorithms used a xed cut line sequence that is determined before min...
Kazuhiro Takahashi, Kazuo Nakajima, Masayuki Terai...
ICCAD
1994
IEEE
119views Hardware» more  ICCAD 1994»
9 years 5 months ago
Multi-level network optimization for low power
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
Sasan Iman, Massoud Pedram
ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
9 years 5 months ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
ICCAD
1994
IEEE
122views Hardware» more  ICCAD 1994»
9 years 5 months ago
An enhanced flow model for constraint handling in hierarchical multi-view design environments
In this paper we present an enhanced design flow model that increases the capabilities of a CAD framework to support design activities on hierarchical multi-view design descriptio...
Pieter van der Wolf, K. Olav ten Bosch, Alfred van...
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
9 years 5 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
ICCAD
1994
IEEE
144views Hardware» more  ICCAD 1994»
9 years 5 months ago
Power analysis of embedded software: a first step towards software power minimization
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical com...
Vivek Tiwari, Sharad Malik, Andrew Wolfe
ICCAD
1994
IEEE
80views Hardware» more  ICCAD 1994»
9 years 5 months ago
Folding a stack of equal width components
We consider two versions of the problem of folding a stack of equal width components. In both versions, when a stack is folded, a routing penalty is incurred at the fold. In one v...
Venkat Thanvantri, Sartaj K. Sahni
ICCAD
1994
IEEE
102views Hardware» more  ICCAD 1994»
9 years 5 months ago
Clock period constrained minimal buffer insertion in clock trees
Gustavo E. Téllez, Majid Sarrafzadeh
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