Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

7

ICCAD
1990
IEEE

favoriteEmaildiscussreport

48views Hardware» more ICCAD 1990»

High-Level Delay Estimation for Technology-Independent Logic Equations

13 years 8 months ago

High-Level Delay Estimation for Technology-Independent Logic Equations

Download www.cse.hcmut.edu.vn

David E. Wallace, Mandalagiri S. Chandrasekhar

Real-time Traffic

Hardware | ICCAD 1990 |

claim paper

Related Content

» Power Macromodeling for High Level Power Estimation

» FPGA interconnect design using logical effort

» Accurate Area and Delay Estimators for FPGAs

» Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement

» Rapid estimation of control delay from highlevel specifications

» Technology Mapping for Reliability Enhancement in Logic Synthesis

» Fixed points for multicycle path detection

Post Info
More Details (n/a)

Added	11 Aug 2010
Updated	11 Aug 2010
Type	Conference
Year	1990
Where	ICCAD
Authors	David E. Wallace, Mandalagiri S. Chandrasekhar

Comments (0)