VESPA: portable, scalable, and flexible FPGA-based vector processors

While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction sets to include support for vector processing. The resulting system of vectorized software and soft vector processor hardware is (i) portable to any FPGA architecture and vector processor configuration, (ii) scalable to larger yet higher-performance designs, and (iii) flexible, allowing the underlying vector processor to be customized to match the needs of each application. Using our robust and verified parameterized vector processor design and industrystandard EEMBC benchmarks, we evaluate the performance and area trade-offs for different soft vector processor configurations using an FPGA development platform with DDR SDRAM. We find that on average we can scale performance

• Type: Conference
• Year: 2008
• Where: CASES
• Authors: Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
• Keywords: CASES 2008, Soft Vector Processor, System Software, Vector Processor, Vector Processor Configurations