High-Level Specification of Runtime Reconfigurable Designs

”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, enables an application developer to describe hardware using a large subset of standard C. While the Impulse C simulation and implementation tools provide an excellent high-level development environment for FPGA applications, no provisions exist for describing dynamic hardware. Through the addition of new functions and slight modifications to the behavior of the existing tools, the Impulse C language becomes a powerful development framework for dynamic reconfiguration of FPGA hardware. This modified language will constitute the input to an automated implementation flow.

• Type: Conference
• Year: 2007
• Where: ERSA
• Authors: Stephen D. Craven, Peter M. Athanas
• Keywords: ERSA 2007, FPGA, Hardware, Impulse C, Impulse C Simulation