Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

5

ASPDAC
2010
ACM

favoriteEmaildiscussreport

137views Hardware» more ASPDAC 2010»

Resilient design in scaled CMOS for energy efficiency

13 years 2 months ago

Resilient design in scaled CMOS for energy efficiency

Download www.asp-dac.itri.org.tw

James Tschanz, Keith A. Bowman, Muhammad M. Khella

Real-time Traffic

ASPDAC 2010 | Hardware |

claim paper

Related Content

» Energy efficient implementation of parallel CMOS multipliers with improved compressors

» Globally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges

» Managing variability for ultimate energy efficiency

» Buffer sizing for minimum energydelay product by using an approximating polynomial

» A survey of techniques for energy efficient onchip communication

» Postlayout comparison of high performance 64b static adders in energydelay space

» Improving Energy Efficiency of Configurable Caches via TemperatureAware Configuration Sele...

» Probabilistic arithmetic and energy efficient embedded signal processing

» Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits

Post Info
More Details (n/a)

Added	10 Feb 2011
Updated	10 Feb 2011
Type	Journal
Year	2010
Where	ASPDAC
Authors	James Tschanz, Keith A. Bowman, Muhammad M. Khellah, Chris Wilkerson, Bibiche M. Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, Vivek De

Comments (0)