The synthesis of combinational logic to generate probabilities

As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies such as PCMOS exploit them as a source of randomness. The technology generates random numbers that are used in probabilistic algorithms. With the PCMOS approach, different voltage levels are used to generate different probability values. If many different probability values are required, this approach becomes prohibitively expensive. In this work, we demonstrate a novel technique for synthesizing logic that generates new probabilities from a given set of probabilities. Three different scenarios are considered in terms of whether the given probabilities can be duplicated and whether there is freedom to choose them. In the case that the given probabilities cannot be duplicated and are predetermined, we provide a solution that is FPGA-mappable. In the case that the given probabilities cannot be duplicated but can b...

• Type: Journal
• Year: 2009
• Where: ICCAD
• Authors: Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja
• Keywords: Arbitrary Decimal Probabilities, Hardware, ICCAD 2009, Nanometer Regime, Probabilities