Synthesis of irregular combinational functions with large don't care sets

A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the input assignments mapped to specified values (‘1’ or ‘0’) are randomly spread over the definition space. Such functions can be encountered in the field of design for test. The proposed method uses ordered BDDs for logic manipulations and generates free BDD-like covers. For the considered benchmark functions, implementations were found with a significant reduction of the node/gate count as compared to SIS or to methods offered by a state-of-the-art BDD package. Categories and Subject Descriptors B.6.3 [Logic Design] Design Aids. General Terms: Algorithms, Design.

• Type: Conference
• Year: 2007
• Where: GLVLSI
• Authors: Valentin Gherman, Hans-Joachim Wunderlich, R. D. Mascarenhas, Jürgen Schlöffel, Michael Garbers
• Keywords: Boolean Functions, GLVLSI 2007, Logic Synthesis Problem, Such Functions, VLSI