Improving support for locality and fine-grain sharing in chip multiprocessors

Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with the modified cache lines still residing in the writer’s primary cache when accessed. Chip multiprocessors present an opportunity to optimize for fine-grain sharing using direct access to remote processor components through low-latency on-chip interconnects. In this paper, we present Adaptive Replication, Migration, and producer-Consumer Optimization (ARMCO), a coherence protocol that, to the best of our knowledge, is the first to exploit direct access to the L1 caches of remote processors (rather than via coherence mechanisms) in order to support fine-grain sharing. Our goal is to provide support for tightly coupled sharing by recognizing and adapting to common sharing patterns such as migratory, producer-consumer, multiple-reader, and multiple readwrite. The protocol places data close to where it is mos...

• Type: Conference
• Year: 2008
• Where: IEEEPACT
• Authors: Hemayet Hossain, Sandhya Dwarkadas, Michael C. Huang
• Keywords: Direct Access, Hardware, IEEEPACT 2008, Sharing, Sharing Patterns