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16

ACSD
2007
IEEE

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Output-Determinacy and Asynchronous Circuit Synthesis

13 years 11 months ago

Output-Determinacy and Asynchronous Circuit Synthesis

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Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour. In this paper we propose (and justify) a formal semantics of nondeterministic STGs with dummies and OR-causality. For this, we introduce the concept of output-determinacy, which is a relaxation of determinism, and argue that it is reasonable and useful in the speed-independent context. With our theory we improve an STG decomposition algorithm, which can alleviate state explosion.

Victor Khomenko, Mark Schäfer, Walter Vogler

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ACSD 2007 | Asynchronous Circuit Behaviour | Hardware | Signal Transition Graphs | STG Decomposition Algorithm |

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Added	02 Jun 2010
Updated	02 Jun 2010
Type	Conference
Year	2007
Where	ACSD
Authors	Victor Khomenko, Mark Schäfer, Walter Vogler

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