VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax

— We present a new multi-rate architecture for decoding irregular LDPC codes in IEEE 802.16e WiMax standard. The proposed architecture utilizes the value–reuse property of offset min-sum, block-serial scheduling of computations and turbo decoding message passing algorithm. The decoder has the following advantages: 55% savings in memory, reduction of routers by 50%, and increase of throughput by 2x when compared to the recent state-of-the-art decoder architectures.

• Type: Conference
• Year: 2007
• Where: ICC
• Authors: Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Mohammed Atiquzzaman
• Keywords: Communications, ICC 2007, Ieee 802.16e Wimax, State-of-the-art Decoder Architectures, Turbo Decoding Message