Robustness of circuits under delay-induced faults : test of AES with the PAFI tool

Security of cryptographic circuits is a major concern. Fault attacks are a mean to obtain critical information with the use of physical disturbance and cryptanalysis. We propose a methodology and a tool to analyse the robustness of circuit under faults induced by a delay. We tested a circuit implementing AES and showed that delay faults can permit to perform known fault attacks.

• Type: Conference
• Year: 2007
• Where: IOLTS
• Authors: Olivier Faurax, Assia Tria, Laurent Freund, Frédéric Bancel
• Keywords: Circuit Implementing Aes, Cryptographic Circuits, Fault Attacks, IOLTS 2007, Software Engineering