Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

5

ASPDAC
2004
ACM

favoriteEmaildiscussreport

78views Hardware» more ASPDAC 2004»

Automatic generation of bus functional models from transaction level models

13 years 10 months ago

Automatic generation of bus functional models from transaction level models

Download www.cecs.uci.edu

Dongwan Shin, Samar Abdi, Daniel Gajski

Real-time Traffic

ASPDAC 2004 |

claim paper

Related Content

» Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus mode...

» Interface synthesis for heterogeneous multicore systems from transaction level models

» Exploring SW Performance Using SoC TransactionLevel Modeling

» Automatic generation of transaction level models for rapid design space exploration

» Fast and accurate protocol specific bus modeling using TLM 20

» TransactionLevel Models for AMBA Bus Architecture Using SystemC 20

» Fast and accurate transaction level models using result oriented modeling

» Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Netwo...

» From TLM to FPGA Rapid Prototyping with SystemC and Transaction Level Modeling

Post Info
More Details (n/a)

Added	30 Jun 2010
Updated	30 Jun 2010
Type	Conference
Year	2004
Where	ASPDAC
Authors	Dongwan Shin, Samar Abdi, Daniel Gajski

Comments (0)