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ITC
1989
IEEE

CMOS IC Stuck-Open Fault Electrical Effects and Design Considerations

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CMOS IC Stuck-Open Fault Electrical Effects and Design Considerations
- The electrical effects of CMOS IC physical defects that caused stuck-openfaults are evaluated, including their voltage levels, quiescent power supply current (IDDQ), transient response, and important testing considerations. The transient responses of the defective node voltage and power supply current to the high impedance state caused by a stuck-opendefect were measured to determine if the IDDQ measurement technique could detect stuck-openfaults. technique does detect stuck-openfaults in some designs, but detection is not guaranteed for all circuits. reduce the probability of stuck-openfault occurrence are presented. The IDDQ Modifications to the circuit layout to
Jerry M. Soden, R. Keith Treece, Michael R. Taylor
Added 11 Aug 2010
Updated 11 Aug 2010
Type Conference
Year 1989
Where ITC
Authors Jerry M. Soden, R. Keith Treece, Michael R. Taylor, Charles F. Hawkins
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