Sciweavers

Share
USENIX
2003

Design and Implementation of Power-Aware Virtual Memory

9 years 11 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-integrated systems, and as battery technology falls further behind, managing energy is becoming critically important to various embedded and mobile systems. In this paper, we propose and implement power-aware virtual memory to reduce the energy consumed by the memory in response to workloads becoming increasingly data-centric. We can use the power management features in current memory technology to put individual memory devices into low power modes dynamically under software control to reduce the power dissipation. However, it is imperative that any techniques employed weigh memory energy savings against any potential energy increases in other system components due to performance degradation of the memory. Using a novel power-aware virtual memory implementation, we estimate a significant reduction in memory po...
Hai Huang, Padmanabhan Pillai, Kang G. Shin
Added 01 Nov 2010
Updated 01 Nov 2010
Type Conference
Year 2003
Where USENIX
Authors Hai Huang, Padmanabhan Pillai, Kang G. Shin
Comments (0)
books