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» Design and Implementation of Power-Aware Virtual Memory
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USENIX
2003
10 years 1 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin
DATE
2004
IEEE
135views Hardware» more  DATE 2004»
10 years 3 months ago
A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design
We present the design exploration of a System-on-Chip architecture dedicated to the implementation of the HIPERLAN/2 communication protocol. The task was accomplished by means of ...
Francesco Menichelli, Mauro Olivieri, Luca Benini,...
IPPS
1997
IEEE
10 years 4 months ago
Design and Implementation of Virtual Memory-Mapped Communication on Myrinet
This paper describes the design and implementation of the virtual memory-mapped communicationmodel (VMMC) on a Myrinet network of PCI-based PCs. VMMC has been designed and impleme...
Cezary Dubnicki, Angelos Bilas, Kai Li
CSSE
2008
IEEE
10 years 6 months ago
Design and Implementation of the Virtual Machine Constructing on Register
: The technology of virtual machines is widely applied in many fields, such as code transplanting, cross-platform computing, and hardware simulation. The main purpose is to simulat...
Weibo Xie, Fu Ting
COMPUTER
1998
119views more  COMPUTER 1998»
9 years 11 months ago
Virtual Memory: Issues of Implementation
ion layer3,4 hides hardware particulars from the higher levels of software but can also compromise performance and compatibility; the higher levels of software often make unwitting...
Bruce L. Jacob, Trevor N. Mudge
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